Backplane

Front-end Backplane (CS-P-1863-A)

Features

Integration of System TTL master clock
VME bus compatible (only P1)
One AQ modules can plug in
Slot ID are adjustable on AQ modules
Master/Slave properties can be set on AQ modules

{GIGA module}

Front-end Backplane(CS-P-1924-B)

Features

Integration of System TTL master clock
VME bus compatible (P1 and P2)
Two AQ modules can plug in
Slot ID are adjustable on backplane ((JPx3..JPx0)
Master/Slave properties can be set on backplane (JPx5)
Data bus and control signals can be terminated on backplane
Stripline are imbedded within the PCB groung layers
A stripline exhibits better signal integrity because the reference planes shield the conductor from damaging EMI fields.

{GIGA module}

Extended Front-end Backplane(CS-P-1925-A)

Features

VME bus compatible (P1 and P2)
Up to 9 AQ modules can plug in
Slot ID are adjustable on backplane ((JPx3..JPx0)
Master/Slave properties can be set on backplane (JPx5)
Stripline are imbedded within the PCB groung layers
A stripline exhibits better signal integrity because the reference planes shield the conductor from damaging EMI fields.
To get higher bandwidth the bus can be split up in two part, so that a data rate of 160 MB can be achived.

{GIGA module}

Back-end Backplane(CS-P-1947-A)

Features

VME bus compatible (P1 and P2)
Up to 4 modules can plug in
The bus is terminated.
Stripline are imbedded within the PCB groung layers

{GIGA module}